How Intel’s Innovation Problem Became a National Security Crisis

In April 2024, eight months before his December “retirement” as U.S. semiconductor chip manufacturing champion Intel’s leader, its CEO Pat Gelsinger gave a remarkably frank public analysis of Intel’s ongoing difficulties.¹ Once the global chip manufacturing leader, Intel at that moment ranked third among the only three remaining global companies mass producing advanced logic chips and made none of the most advanced chips, currently manufactured using 3 nanometer “technology node” fabrication processes.² Intel’s most advanced chips in volume production internally were several generations behind the leader, Taiwan Semiconductor Manufacturing Corporation (TSMC), and lagged number two Samsung’s chips as well. Yet no other American company today even approaches Intel’s level of prowess in advanced, leading-edge manufacturing technology. Number two Samsung is credibly reported to be faltering as well, at the latest and most demanding 3 nanometer technology node, so is attempting to leapfrog to 2 nanometer chips. This currently leaves TSMC alone as the de facto leading-edge chip fabrication monopolist.³

The occasion for Gelsinger’s big reveal was Intel separating its public accounting and reporting into two separate, “virtual” companies, “Intel Foundry,” and “Intel Products.” Intel from its beginning had manufactured its own chip designs. Over time, the global chip industry had moved in a different direction: separation of the industry into specialized “fabless” chip design companies that do no manufacturing, and semiconductor “foundry” companies that only manufacture the designs of others. Gelsinger’s strategic analysis of Intel’s problems—resulting primarily from a radical change in the economics of the semiconductor chip manufacturing business—is fundamentally correct.⁴ This “radical” change in the economics of semiconductor fabrication, a change with consequences missed by Gelsinger’s most recent predecessors at Intel, left the company vulnerable as the pace of chip cost declines slowed during the first decade of the twenty-first century.⁵ Ironically, this big economic change was neither invisible nor particularly fast-moving, and its implications should have been grasped far sooner by Intel’s top management (and Intel’s board of directors), in the two decades preceding Mr. Gelsinger’s return to Intel in 2021.

Gelsinger was unable to fully execute a successful response to this economic shift during his truncated tenure as CEO, however, and to push his proposed new corporate “Intel IDM 2.0” business model. He resigned in 2024 under pressure from the company’s board.

Gelsinger’s strategy included continuing development of five improved sets of process technologies in four years and its next obvious stage: a formal Intel split into completely separate foundry and design (products) companies.⁶ Gelsinger had bet big—$100 billion in capital investments through 2027 in new production plants, serving the new foundry business model, at the expense of short-term profits—in order to restore Intel to a leading-edge position in chip manufacturing technology, with its currently emerging “18A” technology process. But his tenure ended before its 18A chips debuted. Intel’s foundry/design split accommodates very different business economic models, and from a U.S. defense policy perspective, very different national security imperatives.

Whether Gelsinger’s performance or the current Intel board’s impatience and shortsightedness bear ultimate responsibility for this implementation failure is unclear.⁷ Intel’s current problems were decades in the making. But this past history has now created an acute American defense industrial crisis with global national security ramifications. Before turning to the economics behind the current turmoil at Intel, we first consider the geopolitics of why Intel matters for U.S. national security.

National Security and the Rise of Semiconductors

Central to semiconductor technology development over time has been a series of focused interventions by governments, initially in the name of national defense, and more recently, national economic advantage. As we look at current developments in the semiconductor sector, we need to understand the major role played by the U.S. Department of Defense (DoD) in particular, in the evolution of the semiconductor industry.

The initial growth of the chip industry from the 1950s through the early 1970s was heavily dependent on a DoD willing to pay top dollar for bleeding-edge chip technology that would offset Soviet numerical advantages in weapons systems production, and technological advantages in rocket payload boost capabilities. Key elements of U.S. commercial chip manufacturing technologies were accelerated in the 1960s and early 1970s by both defense subsidies to R&D projects targeting improvements in performance and reliability of chips, as well as DoD willingness to pay breathtakingly high prices for chips meeting those goals.

DoD and NASA were almost the only customers for integrated circuit chips in their first four years of production.⁸ Integrated circuits (ICs) were the heart of defense computer systems, both for general purposes as well as specialized guidance systems for missiles and space systems. The Air Force largely paid for Texas Instruments’ (TI) first 1961 leading-edge IC factory (implementing the pathbreaking Fairchild Semiconductor silicon planar manufacturing process which cemented the reputation of Fairchild’s—later Intel’s—Robert Noyce as co-inventor of the IC with TI’s Jack Kilby).⁹ U.S. chip fabrication capability in metal oxide semiconductor (MOS) technology, which revolutionized chip design and manufacturing in the late 1960s and 1970s, was accelerated by funding by the National Security Agency (NSA) of exploratory projects at TI and a pair of pioneering startup MOS chip companies (AMI and GMe).¹⁰ Part of TI’s MOS group then left to form Mostek, which seized technological leadership from Intel and TI in computer memories in the 1970s and early 1980s. Fairchild also received substantial funding from the NSA to develop low power chips,¹¹ but its slow commercialization of its internal MOS technology R&D was one of the frustrations prompting Noyce and Gordon Moore to leave Fairchild and form Intel in 1968, with production of cost-effective computer memory chips as a primary business objective.¹²

Even more importantly, the Central Intelligence Agency (CIA), Defense Advanced Research Projects Agency (darpa), and Air Force in the 1950s and 1960s had sponsored development of advanced optoelectronic technologies for use in spy satellites. With space and surveillance applications in mind, these same agencies supported a “micropower” research program intended to reduce feature sizes—and power consumption—on ICs by an order of magnitude. A prototype projection system from this project was created by DoD optical systems contractor Perkin-Elmer. Combining this idea with other technical advances developed for defense use in air and space optical surveillance platforms, Perkin-Elmer introduced a revolutionary new, commercially viable pro­jection patterning system—the Micralign projection aligner—in 1973. It delivered hugely improved chip manufacturing productivity, and kickstarted a “great leap forward” in MOS chip manufacturing technology that continued from the mid-1970s until the present.¹³ Forty years of subsequent, steady, incremental improvements in chip patterning technology evolved into today’s schoolbus-sized Extreme Ultraviolet (EUV) lithography machines, selling for $250 to $400 million each, used in creating the densest and most energy-efficient chips powering recent artificial intelligence (AI) advances. (EUV is a media-friendly term describing what has also been called “soft X-rays.”¹⁴)

Today’s EUV monopolist, the Netherlands’ ASML, is built in large measure from the remnants of U.S. tech companies and their suppliers: Perkin-Elmer, whose chip lithography division was acquired by SVGL, in turn acquired by ASML with capital from Dutch Philips,¹⁵ and GCA, which shut down after failing to obtain needed capital from U.S. private and government investors in the 1990s. GCA’s advanced lens supplier, Carl Zeiss, became ASML’s lens producer.¹⁶ Japan’s Nikon, an earlier GCA lens supplier in the 1960s,¹⁷ ended up reverse engineering and improving GCA’s wafer patterning machines as part of Japan’s Very Large Scale Integrated (VLSI) Project, a government-industry cooperative R&D initiative of the late 1970s,¹⁸ accelerating GCA’s decline in the 1980s.) Perkin-Elmer’s Connecticut plant, now greatly expanded, remains as one of ASML’s two major U.S. plants.

In the mid-to-late 1970s, as commercial applications for this innovative chip technology exploded, and commercial markets surged well beyond DoD demand for leading edge chips, the direct DoD role in the U.S. chip industry’s success rapidly shrank. Defense Secretary Harold Brown and Undersecretary William Perry developed their “offset strategy” starting in 1977,¹⁹ using advanced electronics-based technologies and chips in defense systems, from cruise missiles to precision weapons to stealth to drones. Put most bluntly, defense access to leading-edge electronics, software, and computing capability, now mainly developed for use in commercial products, was expected by Brown and Perry to provide the U.S. military and its weapons systems with a technological advantage more than sufficient to offset the poten­tial numerical superiority of possible adversaries in fielded manpower and weapons.

Early Challenges and the Rise of Fabless Chip Design

DoD’s offset policy met its first significant challenge in the early 1980s, when Japanese semiconductor producers surged ahead of U.S. manufacturers in the manufacturing technology used to fabricate the highest volume advanced semiconductors of the day, memory chips.²⁰ Japan’s producers focused on improving semiconductor lithography patterning equipment (originally U.S. imports) for use in the largest “commodity” market for ICs: dynamic random access memory chips (DRAMs). They refined a production system for mass-market chips in highly automated ultraclean factories, obtaining higher yields and reliability at lower cost than U.S. producers. The ultraclean laminar air flow cleanroom technology used in these fabs was also initially developed in the U.S., at the Atomic Energy Commission’s Sandia Lab, and deployed by U.S. defense and space contractors in the 1960s,²¹ then introduced into Japan by TI Japan in the early 1970s.²² Refining these approaches, Japanese chip producers had become technology leaders in memory chip manufacturing by the early 1980s, benefitting from industry-wide tech initiatives organized by the Japanese government and NTT,²³ then a state-owned telecom monopoly.

The Ronald Reagan administration responded with a multipronged national policy, negotiating “voluntary” restrictions on Japanese memory chip exports, applying significant pressure on Japan to buy more U.S. chips, and providing substantial funding for a successful partnership with the U.S. semiconductor industry on a cooperative R&D program to improve its chip manufacturing technology, sematech.²⁴ The effort was largely successful, U.S. chip manufacturing regained its momentum, and the federal R&D subsidy ended in 1997.²⁵

One unanticipated effect of the restrictions on Japan, however, was to assist entry by new producers in Korea and Taiwan into memory chip production. Most U.S. producers—like Intel—ultimately exited the commodity memory chip business and instead focused on manufacturing new kinds of chip designs, particularly microprocessors and other kinds of system and logic chip designs. The exceptions were TI and Micron Technology (founded by engineers from Mostek, the TI MOS technology spin-off which had become a memory chip tech leader in the 1970s), which moved production overseas to take advantage of state-funded financial incentives. TI eventually exited the memory market, opting to focus on design of signal processing and analog chips, and adopting a “fab lite” strategy that did not require huge investments in leading-edge chip factories.

Micron stayed in the memory business and focused on design innovation, cost efficient manufacturing overseas, and exploitation of scale economies. Micron also snapped up failed memory chip producer fabrication capacity at bargain-basement prices as the industry consolidated, including that of Qimonda (an offshoot of German electronics multinational Siemens) and TI,²⁶ as well as that of Taiwanese and Japanese producers when they ultimately exited in the twenty-first century. Aside from recent and as yet unproven Chinese entrants, Korea’s Samsung and Hynix, and Micron, today are the only DRAM chip players left standing. (They were joined recently by new Chinese memory chipmakers selling primarily—at the moment—to the Chinese electronics industry.²⁷) The same three companies plus Japan’s Kioxia (a Toshiba spin-off partnered with American firm Western Digital) are also the remaining (non-Chinese) fabricators of flash memory.

So-called “fabless” chip design houses that did no fabrication became increasingly important in the chip industry. Fabless firms include Qualcomm, Nvidia (which never owned fabs), IBM, and Advanced Micro Devices (AMD) after they divested their fabs to Global Foundries, and design groups within Apple, Google, Amazon, Microsoft, and Meta. The fabless design firms sent their designs off to be manufactured at so-called foundries in the United States, Singapore, Taiwan, and Korea, many of which only did manufacturing, and no design work on their own. The oldest, largest, and most important of these “pure play” foundry firms was in Taiwan—TSMC.

What became the foundry business started in the mid-1980s, benefiting from a substantial DoD investment from the late 1970s through the 1980s in chip design software tools, standards, and infrastructure. Defense-funded investments in chip design technology and standards in that period supported U.S. leadership in chip design, and this underlay the explosion in fabless chip design in 1980s and 1990s, as well as the creation of the foundry business model developed by TSMC after 1987. Most notable was work in the late 1970s by researchers at Caltech and Xerox PARC to develop a greatly improved system for VLSI (Very Large Scale Integration) chip design using ad­vanced software tools.²⁸ Further development of these tools enabled the complete separation of chip design from chip manufacturing, and the development of fabless (design-only) and foundry (manufacturing-only) chip firms which followed. This work was picked up and supported by darpa in 1978, and became the foundation for its VLSI program, which approached $100 million in annual funding by 1982.²⁹ By the mid‑1980s, the initial darpa program had been subsumed into an even larger, early darpa effort to create a U.S. industrial base for artificial intelligence applications: the Strategic Computing Initiative.³⁰ Though unsuccessful in creating fully autonomous military weapons platforms, this effort underwrote important advances in parallel computing architectures, expert systems, and information-aware battlefield command and control systems.³¹

After 1997, the cooperative industry-government effort to improve chip manufacturing technology housed at sematech was continued by industry for more than an additional decade, with little federal funding, and a new focus on coordinating emerging standards and technology required for successive new generations of manufacturing technology and required equipment and materials. The effort brought together developers of the specialized bits of technology, created by an increasingly globally dispersed and fragmented set of supplier firms with their customers, to launch new semiconductor technology “nodes” (indexed by the minimum feature sizes of the chips they could create—like 130 nanometers, 90 nanometers, etc.) on a predictable schedule. The sematech-led coordination effort (known as the International Tech­nology Roadmap for Semiconductors—the ITRS) was successful, with new generations of manufacturing technology being introduced every two years into the second decade of the twenty-first century.

Sematech and the ITRS effort fell apart after 2010, fundamentally because the scale of investments required to stay at leading edge in chip fabrication had led to a sharp decline in numbers of chip-making firms investing in the manufacture of the most advanced chips. There was simply no economic incentive for the few surviving leading-edge chip producers to coordinate with lagging manufacturers lacking the scale to invest in leading-edge manufacturing.

Federal Interventions after the Cold War

With the end of the Cold War in the early 1990s, the pressure for maintaining a U.S. semiconductor technological advantage largely diminished. This was not to last.

To be clear, episodically, national security interests motivated provision of critical government assistance to private sector efforts despite the end of the Cold War. One good example is EUV silicon wafer patterning technology. Intel, along other chip producers and semiconductor equipment and materials companies, formed a consortium operating at the Department of Energy’s Lawrence Livermore National Lab in 1997 to develop EUV patterning technology.³² The complex, laser-produced light source used in current EUV patterning equipment utilizes laser technology developed for creating fusion reactions within that lab.³³ In general, however, the national security role in providing resources and markets to drive semiconductor manufacturing technology forward was much diminished with the Cold War’s end, and DoD in the early twenty-first century mainly struggled to keep abreast of commercial semiconductor technology for most kinds of digital logic and memory chips.

But DoD microelectronics efforts did not end with sematech. Semiconductor R&D continued at a modest level at darpa over following decades. Prior to the chips Act legislation, and in many ways anticipating it, darpa in 2017 began an Electronics Resurgence Initiative (ERI) to develop new semiconductor materials, designs and architectures;³⁴ this was renewed in 2023 as ERI 2.0 to promote U.S. technology leadership in next generation microelectronics research, development and manufacturing.³⁵ Darpa later received additional funding in the chips Act for this program.

Three decades past the end of the Cold War, however, global military competition is resurgent, and chips are once again increasingly central to national security. This development is not visible in DoD’s share of the overall semiconductor market, which is less than 1 percent. The great bulk of its current needs for existing weapon-system platforms are in so-called legacy chips: 11 percent of its chip spending is for chips under 28 nanometers, 18 percent for chips between 28 and 90 nanometers, and 66 percent for chips between 90 and 350 nanometers.³⁶ The existing DoD inventory of weapons and systems largely does not require the most advanced chips used in commercial equipment (though DoD does require the most advanced signal processing and analog chips, typically supplied by specialized U.S. producers catering to national security requirements).

But it is increasingly clear that the emerging technologies that will decide future conflicts will once again require the most advanced digital logic and memory chips. Artificial intelligence, quantum computing, advanced data centers, and autonomous drones, for example, are now realities, and will require ever faster, ever more powerful and ever less power-hungry chips, and nations with early and assured access to such chips will be able to seize technology dominance.

“Moore’s Law,” announced in 1965 by Intel cofounder Gordon Moore, came to stand for the presumption that every two years chips would double in capability and prices would fall by half.³⁷ While the chip industry over the last decade has clearly fallen off the Moore’s Law pace, with costs for advanced chips no longer falling rapidly and capability increasing more slowly, the chip demands of potentially game‑changing technologies like AI and quantum computing now require DoD to be the first to field equipment making use of advanced chips needed in these applications. National security now requires DoD to regain its position as the premier military user of leading-edge chip technology.

The Present Crisis

That is how we now find ourselves in a moment of national security crisis. Taiwan, which now produces 100 percent of the most advanced chips used in U.S.-designed systems, is eighty miles offshore from a more and more militarily assertive China. China views Taiwan as a breakaway province, has long announced its plans to reassert control, as recently reiterated in Xi Jinping’s 2025 New Year’s greeting,³⁸ and has been increasing the pace of invasion training exercises. With China’s continuing military buildup, the willingness and ability of Taiwan, and the U.S. Seventh Fleet, to block an invasion or prevent a blockade has appropriately come into question. China’s navy is now larger than the U.S. Navy, with 395 ships compared to 296. China is also building vessels at a considerably faster pace than the U.S. Navy, which must maintain a multi-ocean presence.³⁹

Until its new U.S. fabrication facility is completed, TSMC’s more advanced chip fabs have been entirely located in Taiwan. Korea has only a slightly better strategic location, close to China and even closer to an unpredictable and fanatical North Korean regime supported by both China and Russia.

The potentially dire national security situation was aggravated in December 2024 by public remarks from Morris Chang, TSMC’s celebrated founder, generally disparaging Gelsinger and Intel after the CEO’s exit.⁴⁰ Previously, in October 2021, Chang had publicly criticized Gelsinger as “cocky” and “discourteous.”⁴¹ This was after Gelsinger reportedly offended TSMC by publicly saying “You don’t want all of your eggs in the basket of a Taiwan fab” in May 2021. This followed another December 2021 utterance, according to a media source, in the course of “encouraging U.S. investment in U.S. chipmakers, [Gelsinger] said at a tech conference: ‘Taiwan is not a stable place.’”⁴² These less than diplomatic remarks were reported by Reuters’ multiple Taiwanese sources to have led TSMC to cancel a 40 percent discount it was giving Intel on prices for fabricating Intel chip designs on TSMC wafers.⁴³

This discount, or lack thereof, was a serious and possibly critical business issue for Intel. The slides accompanying Gelsinger’s frank April 2024 webinar,⁴⁴ mentioned at the outset of this article, show an Intel reliant on external suppliers—e.g., TSMC—for about 30 percent of its fabricated wafers, which, sliced into individual Intel-branded chips, or chiplets combined with less advanced Intel silicon, are packaged and sold as Intel chips in global markets. Put another way, about 30 percent of chip sales by Intel Product (the new Intel division that designs Intel chips), by volume of silicon (and most likely a higher percentage of revenues), are produced by what are effectively fabless Intel chip design groups. These designs are fabricated outside the company, i.e., manufactured outside of the current Intel Foundry (whose not-so-advanced technology nodes currently suffer from excess capacity, per the April slides). Included in the 30 percent of Intel wafers ordered from TSMC by fabless Intel chip design groups are most, if not all, of its most advanced and complex chip designs, like its Gaudi AI accelerators, its Alchemist and Battlemage graphics processors, and its most recently minted AI-enabled Lunar Lake x86 architecture processors.

If the Reuters reporting is correct,⁴⁵ TSMC’s cancellation of such a large discount could have contributed to Intel’s faltering financials and Gelsinger’s December demise. Whether or not this retaliatory action was executed by TSMC, an important lesson should be learned. If TSMC’s emerging leading-edge chip fabrication monopoly (given the setbacks faced by Intel and now Samsung) threatens to raise its prices, or even to cut Intel off entirely from cutting-edge chip supplies, Intel has no alternatives other than to simply beg for supplies. That is the implication of TSMC’s developing monopoly on the most advanced chips. TSMC’s Taiwan development and production fabs are currently the only foundries capable of fabricating what are now Intel’s most advanced and complex chip designs. Worse, Intel’s vulnerability shows the potential vulnerability of all U.S. chip design groups producing advanced logic and system chips, at Nvidia, Qualcomm, AMD, Amazon, Apple, Google, Meta, Microsoft.

For any defense contractor or government user with an imperative current or future need to access the most advanced available chip manufacturing technology, reliance on a sole Taiwanese source is a significant national security risk. This reality requires open dialog with Taiwanese colleagues, not hiding growing concerns away from view.

Taking a narrow view, the short-term national security threat may look less severe than the economic risk. Few of these most advanced, Taiwan-only fabbed chips are currently designed into fielded weapons platforms. By contrast, the most advanced fielded IT products and services currently being sold by cutting-edge U.S. information tech companies are, or will be, entirely dependent on TSMC chips fabbed in Taiwan.

But over the long term, the national security risk is even graver than the economic threat: because of the rapid recent development of AI capabilities and a pressing need to incorporate powerful new information technology making use of AI into U.S. defense systems, and because none of the next generation of most advanced leading-edge fabrication capacity will be physically located in the United States, where production priorities in times of dire U.S. national emergency are potentially subject to Defense Production Act (DPA) authorities.

Gelsinger’s language may have been undiplomatic, but, unfortunately, it accurately describes a supply chain risk that America in the last few years has been taking very seriously. TSMC’s Chang, on the other hand, ignores legitimate U.S. national security interests when he suggests that Intel should abandon its foundry business (which will compete with TSMC’s) and focus on designing successful AI chips (locking it into a pure TSMC customer role).

The fact is that the United States has no fundamental national security interest in assuring the survival of Intel Products—Intel’s chip design business—which aspires to compete against the many other U.S.-based companies designing and selling both AI-related chips and AI services making use of these chips, as well as computer processors (CPUs), graphic processor units (GPUs) and customized accelerator chips used for AI, networking, and other logic and systems chips. In contrast, the United States has an overwhelming national security interest in ensuring that DoD and its contractors have access to a U.S.-located foundry that can develop and use cutting-edge manufacturing technology to produce advanced AI accelerator chip designs, and other advanced chips now and into the future. Making Intel Foundry a success is the only current option that assures U.S. access to a U.S.-located leading-edge chip manufacturing technology development and production capability should supply chains in East Asia be obstructed by military action.

This situation could change if U.S.-Taiwan security discussions were to frankly and explicitly address the vulnerability of global supply chains running through Taiwan to military pressure from China. To guarantee that Taiwan’s own military forces can replenish their armaments in the face of military pressure from China, as a quid-pro-quo for U.S. commitments to assist Taiwan with its defense, Taiwan should be willing to take steps to assure U.S. access to the most advanced chip manufacturing technology developed at TSMC, under scenarios that reduce or interrupt output from TSMC’s Taiwan fabs. To be counted as a reliable sole source for critical components needed by the U.S. defense industrial base, TSMC should be willing to both develop the next generation of leading-edge technology, and manufacture using the current generation of advanced chip manufacturing technology, within high volume North American facilities, in parallel with any Taiwan-located development and production facilities.

 In other words, the only circumstance under which TSMC, the leading-edge monopoly chip company, can truly de-risk its status as a sole source supplier to U.S. chip design groups is if TSMC has U.S.-located development and production capacity that mirrors leading edge capabilities now only present in Taiwan. Nevertheless, this commitment likely will require further U.S. subsidy as well as changes to Taiwanese laws to make it an economically viable proposition. In addition, TSMC’s rich talent base and huge chip production infrastructure lock it into its Taiwan location for a long time to come, even if it is now building essentially two follow-on plants in the United States which will produce at levels lagging well behind TSMC’s fabs in Taiwan. These are signifi­cant barriers to meeting U.S. security needs. Nonetheless, a realistic security dialogue with Taiwan and TSMC should commence. But a successful and healthy leading-edge Intel Foundry realistically remains the only current policy option that deserves U.S. public subsidy on both national security and economic security (supply-chain risk) grounds.

The CHIPS Act and National Security

In 2022, motivated by these glaring national security considerations, Congress passed and funded, with bipartisan support, the chips Act, providing $39 billion in grants, $75 billion in loan guarantees, and $24 billion in tax incentives for new semiconductor fab construction in the United States, plus $11 billion for semiconductor R&D.⁴⁶ The funding has helped leverage private sector investment in a series of new fabs being built in the United States, including four by Intel in Arizona and Ohio, two by TSMC in Phoenix, and two by Samsung in Texas. Overall, the federal commitment has helped leverage an estimated $834 billion in private sector investment in U.S.-located fabs,⁴⁷ although these numbers have slipped slightly in recent months because of a post-Covid decline in computer central processing unit (CPU) demand.⁴⁸ Chips Act–driven investments may nudge the share of world chip output produced in the United States up from 12 to 15 to 20 percent.⁴⁹

The chips Act obviously marks a dramatic change in the U.S. government’s attitude to semiconductor plant financing—it is a clear defense industrial policy. It is important to keep it in perspective, however: China has $142 billion in government financing either underway or planned and has more fabs under construction than any other nation.⁵⁰ Europe has its own chips effort with $46 billion, and Korea, Japan, and Taiwan are all making major investments.

This brings us back to the geopolitics surrounding Intel. Both TSMC and Samsung retain the great majority of their advanced chipmaking in their own home countries and will continue to do so. In fact, Taiwan has established regulations preventing next generation chips from TSMC from being produced outside of Taiwan, in an effort to assure that advanced chip production leadership stays in Taiwan (and perhaps, creating a “tech hostage” that the United States will be compelled to defend).⁵¹ Four new fabs in the United States from TSMC and Samsung may help through 2030 in assuring DoD access to recent-generation advanced chips, but will not provide access to the next round of the most advanced chips. These new fabs do not fully solve the U.S. national security problem, and do not solve potential supply chain security problems in an era when economic or supply-chain security is a vital component of national security. With “chips in everything,” if TSMC production collapsed after an invasion, the effect on the U.S. economy would be prompt and dramatic.

Over the longer term, the threat to U.S. national security from a Chinese takeover of Taiwan would be even more profound, arising from two factors that are rarely discussed when this issue is considered. First, while close to half of human chip designers are physically located in the United States, about 20 percent are located in Taiwan (historically facilitated by convenient local availability of foundry capacity). Though the U.S. share of chip design revenue and its ability to train designers to meet demand have slipped in recent years, chip design capability remains a crown jewel in the U.S. technology industrial base.⁵² As we emphasize below, from a security perspective, those Taiwanese chip designers are a human resource as or perhaps even more important than the physical fab capacity in Taiwan that is producing the world’s most advanced chips.

Second, TSMC, in Taiwan, possesses, or is able to access, forty years of chip design information for the many chip designs, or “tapeouts,”⁵³ supplied to it by its many customers throughout the world. In a doomsday, worst case scenario, if TSMC’s tangible and intangible assets were to become subject to China’s 2017 National Intelligence Law,⁵⁴ then the Chinese government could compel access to those decades of tapeouts as critical to China’s national security. The tapeout for a chip, combined with relevant information in the TSMC Process Development Kit (PDK) for that chip, could be used to first reverse engineer a mapping of transistors and their connections as implemented in the chip (a “netlist”), and combining that, in turn, with some expert engineering knowledge, the logical and functional design of a chip could ultimately be deciphered.

If, as we believe to be the case, current generation AI technology has already demonstrated that chip design tools can be trained with more and better chip design information to further automate the costly process of chip design, then the decades of chip design tapeouts in TSMC’s cyberspace vaults are an extremely valuable database that could ultimately be used to engineer leaps forward in application of AI models to chip design. Rapid and inexpensive AI-assisted chip design has the potential to both greatly reduce cost and accelerate the insertion of leading-edge chip designs into both military and commercial applications. Access to the accumulated inventory of chip tapeouts used in the manufacture of chips by TSMC, by far the largest foundry in the world, past and present, could prove as or more valuable than the physical TSMC fabs located in Taiwan.

As the only U.S. firm in a practical position to build leading-edge chip production capability in the U.S. within a realistic time horizon, Intel is no longer just another U.S. private sector company; given the geopolitics, it’s a different animal.⁵⁵ The United States, as a matter of national security, has a significant stake in the survival and success of the leading edge “Intel Foundry” entity that Intel has created. Given its massive fab infrastructure and R&D capability, it is not replicable in any reasonable timeframe by another U.S. firm; its former American chip competitors have long since pulled out of the advanced chip manufacturing competition.

This brings us to the changing economics of producing leading-edge chips, why we think Gelsinger’s strategic analysis is fundamentally correct, and what the U.S. should be doing to maximize not just Intel’s, but all U.S. semiconductor companies’ technological lead within a rapidly changing global economy. We will address these issues in detail in a future article. Clear-eyed analysis of the path forward for America’s struggling national champion, Intel, is required, along with a broader approach to rebuilding the U.S. semiconductor manufacturing sector. It is important to recognize that the chips Act is a stopgap measure. It assures some production in the United States of the pending generation of advanced chip processes,⁵⁶ but not the following generations of chips. It was a onetime law; the authorization runs out in 2027, and the funding for constructing new fabs is already committed. The U.S. semiconductor challenge is a long-term one and this was an important but decidedly short-term fix.

Continued financing is not the only need. Major longer-term initiatives backed by DoD are needed in areas such as leveraging AI to radically reduce the cost of advanced semiconductor designs, and for post-CMOS R&D—both offer technology leap-ahead opportunities of first-rank importance. DoD also needs to integrate its current R&D and design efforts with programs evolving at the Commerce Department into a single, coherent national initiative.

Recapturing a leadership role in advanced chips will not be easy or cheap. But the national security implications of failing to do so are profound and disturbing. The defense-industrial crisis that must be addressed is upon us.

This article originally appeared in American Affairs Volume IX, Number 1 (Spring 2025): 40–54.

Notes